Design of Integrated Circuits (TAF)
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VORL; 3 SWS; ben. Schein; ECTS: 5; Di, 13:30 - 15:45, 0.111
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Glauert, W.H.
Frickel, J.
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VORL; 2 SWS; ben. Schein; ECTS: 5; Do, 9:00 - 10:30, 0.111
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Glauert, W.H.
Fiebig, Th.
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UE; 1 SWS; Di, 16:00 - 16:45, 0.111
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Hofmann, R.
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UE; 2 SWS; Do, 10:45 - 12:15, 0.111
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Hofmann, R.
Fiebig, Th.
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