Hardware-Software-Co-Design
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VORL; 2 SWS; ECTS: 4; auch für Computational Engineering
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| | Di | 8:30 - 10:00 | KS II | |
Teich, J. | | |
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UE; 2 SWS; ECTS: 4; auch für Computational Engineering
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| | Mi Di | 16:00 - 18:00 16:00 - 18:00 | 00.151 2.038 | |
Grabbe, C. | | |
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VORL; 2 SWS; ECTS: 4; auch für Computational Engineering; Mo, 10:00 - 12:00, 2.038
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Teich, J.
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UE; 2 SWS; ECTS: 4; auch für Computational Engineering; Mo, Di, 8:00 - 10:00, 00.151
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Haubelt, Ch.
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Hardware-Software-Co-Design Seminar
SEM; 2 SWS; Fr, 14:00 - 16:00, 205
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Hannig, F.
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